1. Field of the Invention
The invention relates to flash analog to digital converters (ADCs), and more particularly to a flash ADC with reversed reference voltage dummy amplifiers.
2. Description of the Related Art
High-speed and low-resolution flash ADCs are widely used in current circuit systems, such as disk drive read channel, DVD playback and communication receiver systems. However, in complementary metal-oxide-semiconductor (CMOS) processes, offset voltages occur in flash ADCs due to device mismatch in preamplifiers and comparators, causing signal distortion.
For conventional flash ADCs, an averaging network is implemented to reduce the offset voltages. The averaging network is coupled to the output terminals of adjacent preamplifiers to average a static offset of a preamplifier array and reduce a dynamic offset of a comparator array. However, in a finite preamplifier array, the preamplifiers located on both sides/boundaries of the preamplifier array will not have the same environment as those located in the middle of the preamplifier array. Therefore, zero crossing (ZX) point offsets of the preamplifiers located on both sides of the array will result in integral nonlinearity (INL) curvature and cause systematic error.
Conventionally, a dummy method is implemented to solve the above boundary problems. The dummy method builds an infinitely long averaging network by increasing enormous amounts of, dummy amplifiers at both boundaries of the preamplifier array to rebuild the same environment as the middle of the preamplifier array and form a cross-connecting array. The dummy method requires enormous amounts of dummy amplifiers, dummy comparators and additional reference voltages, wherein the amount of dummy amplifiers and additional reference voltages are the same. However, in full-scale input range, the additional reference voltages corresponding to the dummy amplifiers will decrease least significant bit (LSB) voltage, thus making it difficult to implement the dummy method in a low supply voltage system.